Honored Contributor
Honored ContributorI've not used the FIR & FFT cores directly. However, I glanced at the list of signals and it seems to me you shouldn't have any trouble doing what your want. Here is what I would do.
1 - Read the Avalon Interface Specification: http://www.altera.com/literature/manual/mnl_avalon_spec.pdf 2 - Generate your FFT and FIR cores as you would normally. 3 - For each core, I would create a wrapper HDL file (this will become your SoPC builder component). In this wrapper HDL file, I would connect up any ports to the IP core that need to be connected to the outside world. Also, if you are going to create some logic that bridges between the Avalon MM world and the IP core, this is the place to do it. For example, I see the FFT core has a few ports (fftpts_in, fftpts_out, inverse, etc.). These won't connect directly to the Avalon bus (though you can export them out of the SoPC system if you want). So you may want to create some addressable registers in your wrapper file to drive these signals. 4 - Create a component using the component wizard. http://www.altera.com/literature/hb/qts/qts_qii54005.pdf http://www.altera.com/literature/hb/qts/qts_qii54007.pdf Your HDL wrapper will be the top-level file for the component. Your component will need: a - One avalon streaming sink b - One avalon streaming source c - Optionally an avalon MM slave interface. d - Optionally a conduit interface if you are going to export any of the signals directly out of SoPC builder. Jake
