Altera_Forum
Honored Contributor
16 years agoControlling Data Skew without Clock
I'm designing a simple switch matrix in which no clock is involved. That is, 8 inputs are directly connected to 8 outputs without going through any registers.
How can I constrain the timing such that the skew among the 8 outputs are less than say 0.5 ns? Another way of putting it is to make sure the tpd of each path are within 0.5 ns tolerance of each other. I tried setting set_max_delay, set_min_delay, or set_max_skew. None of these worked.