Controller with counter [CPU - help]

Hello,

I have been assigned a task in my new course called VHDL (first time in VHDL environment) doing a simple CPU.

What I have done so far are the following (All simulated and working as expected):

• ALU

• Multiplexer

• Registerfile

• Buffer

• ROM

• RW-memory

The next part is to do a controller and a 16 bit programcounter.

16 bit programcounter:

library ieee;use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_signed.all;
use work.all;
use CPU_package.all;
entity Program_Counter is
	PORT(clk, reset : IN std_logic;
		  counter_out : OUT std_logic_vector(15 downto 0));
		  
end Program_Counter;
architecture RTL of Program_Counter is
	Signal Counter : std_logic_vector(15 downto 0) := (others => '0');
	
	begin
	
		process(reset, clk)
		begin
			if(reset = '1') then
				counter <= (others => '0');
			elsif(rising_edge(clk)) then
				counter <= counter + '1';
			end if;
		end process;
		
		counter_out <= counter;
end RTL;

controller:

So far I've made:

• Entity for the controller

• In the architecture, Ive made different kind of states (refer to picture down)

However, this is the part where Im completely stuck at. I can't figure out how the programcounter should interact with the controller.

First state: "fetch instruction",

1. they assign adr := pc and we do know that the adr is connected to both the RW-memory and RAM. In both these components the adr is used to choose which instruction to use (ROM) and also which register(like a big memory) we should read or write to (RW-memory).
   Something that seems strange to me is that according to the specs adr is 4 bit, while pc is 16 bit. Why?

2. rw := 1. Are we supposed to assign it that value when we enter this state? As you can see this is a bit confusing to me.

Second state: "load instruction",

1. I believe that after we have gone through the first state, the RW-memory or ROM will return some data (depends on which one is active) to us from its register, and this data is saved.
   If it is ROM giving us data -> example of an instruction could be : ldi&r3&"0011"
   If it is RW-memory it just contains 4 bits of data. I dont really know what this will give us in the next state.

Third state: "decode instruction",

1. Now we are supposed to decode the instruction (= data).
   If it is from the ROM I can understand what we are supposed to decode, but not with information from RW-memory.

Fourth state: ---

1. So depending on the state before, we enter one of these.

• Write result - The result from the ALU should be written somewhere, perhaps in the fileregister?

• Load data -

• Store data -

• Load immediate -

The last three, Im not sure what to do.

Next state: goes back to the first state

1. Is this where the counter should increment with 1?

https://www.alteraforum.com/forum/attachment.php?attachmentid=7819

https://www.alteraforum.com/forum/attachment.php?attachmentid=7820

You dont have to give me explanations in detail, I could be satisfied with just some directions on what I should do.

Here is also a good page I've found http://www.nt-nv.fh-koeln.de/labor/vhdlenglish/kap8/k832.html

Please keep in mind that Im not interested in any codes, all Im asking is for a push in the right direction.

Cheers