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Altera_Forum
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Honored ContributorConstraints for asynchronous I/O interface
What is the right way to constrain I/Os interfacing an asynchronous device e. g. asynchronous RAM? It seems to be the best way here to define min/max external propagation delay between output and input ports. set_input_delay/set_output_delay are inconvenient because they set separate delay constraints for inputs and outputs when you need only totals. And the delays are dependent on the clock period.
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Altera_ForumHere's something I put together about a flash interface(asynchronous read). Perhaps it can help.
