Constraints entry
Hello,
This is my first time using the Intel forums, so go easy :)
I have some experience with Quartus II but mainly older versions (9 and 13) but recently acquired a new license to 17.1.
I am working on a reasonably large prototype design where pin assignments, IO voltages, drive strength, etc. are likely to change over time as the overall design develops (both from an FPGA and PCB perspective).
Is it possible to generate a text file to create the placement constraints and read the file in when the project opens? I find the Pin Planner GUI a little clumsy.
I have tried creating a TCL based file (set_location_assignment, for example) but I am unsure of what file extension to give this file and then how to import it.
If I save the file as a .qsf and try to "Import Constraints" from the menu, I end up with only partial import and warnings in the console like
"39 non-global assignments were skipped because of entity name mismatch" and I'm not entirely sure what this means (entity meaning what in this context?).
I'm asking here because my feeble Google skills and trawling through the Quartus documentation has left me frustrated.
Thanks.