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Altera_Forum's avatar
Altera_Forum
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14 years ago

Constraining a Stratix IV GX board with an ADC

Hi everyone,

I am using a 12bits differential ADC with a clock rate of 245.76MHz interfaced with the Altera Stratix IV GX board by the HSMC connector.

I am trying to add timing constaints to my design but I don't know how much input delay I should mention.

I have only an information about the data output from the ADC which has a data to clock skew of -0.3ns minimum and 0.5ns maximum.

Please help me in that issue ASAP I am really in rush.

Thank you.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    You can post a followup in the same thread, but you must keep in mind that this forum isn't a commercial support and it can take several days before someone with the right knowledge can answer you. If you need an answer fast you should try and contact your distributor and/or FAE instead.