constant memory usage

This maybe because for the constant cache, there is no need for the kernel to have LSU since the data is onchip. The ROM is not implemented in the kernel since the constant cache is visible to all kernels and therefore will not be reflected in the kernel utilization report.

Thank for your answer !

What do you mean by map to OpenCL code? Those are the resource utilization of your design on the FPGA. Essentially how many of the logic, registers, memory blocks and Dsp are used on the FPGA if you choose to synthesis it down to hardware

In other words , if I use a operation(+,- ,*,\) , will it map to DSP or other blocks

Utilization depends on what you're trying to implement and if it needs it. It also depends on the resources of specific FPGA you have. If you're operation is complex enough such that a DSP can be inferred, then it will use a DSP. Otherwise, it will just implemented it using logic blocks. For example, if you have a = b + 1. A simple incrementer like this would not need a DSP and would probably be more efficient if it was implemented using logic. Essentially, all this mapping is done by the tools.

Thanks !!!

The emulation ran successfully or the hardware synthesis? The emulation does not take utilization into account. So if your design was too large to fit onto the FPGA, the emulation will still run. If it was running after hardware synthesis, i think that the reason might be because there is still logic resources available, and so it tries to implement the operation using the available logic resources on the chip. Otherwise, I would expect the design to fail.

But the global memory is visible to all kernels , will it reflected in the kernel utilization report ?

No. Again, utilization kernel utilization only reports the utilization of that specific kernel. What will probably be reflected in the utilization report is the LSU that is needed in order to access global memory in each kernel. So one thing is if you have