Honored ContributorHi,
I am using DSP development kit stratix ii edition. It has two 16bit SRAM chips. I intent to connect these as one 32bit memory. So essentially, some pins (rather address bits) have to be shared by both. Can someone please advise as to how this can be done during pin assignment in quartus? Thanks Vik
Honored ContributorI'm not familiar with this development kit, but you can simply connect two output addres buses into one in FPGA. For example:
entity SRAM_driver is
port
(
...
address_bus_1 : out std_logic_vector(15 downto 0);
address_bus_2 : out std_logic_vector(15 downto 0);
...
);
end SRAM_driver;
architecture behavioral of SRAM_driver is
...
signal internal_address_signal : std_logic_vector(15 downto 0);
...
begin
...
...
address_bus_1 <= internal_address_signal;
address_bus_2 <= internal_address_signal;
...
...
end behavioral;according to "Stratix II DSP Development Board Reference Manual pp. 2-16,2-18", this kind of connection is already made to the FPGA. Make a review of one of the examples included in your CD for pin assignments for chip IDT71V416S.
Honored ContributorThank you parrado (http://www.alteraforum.com/forum/member.php?u=3631) for the reply. This answers my question exactly! Since I am a beginner I did not realize that the manual was infact pointing out that the SRAMS have already been connected in the configuration I want.
Thanks again VikHonored Contributorthanks for the reply zaquadnik (http://www.alteraforum.com/forum/member.php?u=1532)
