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Altera_Forum
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10 years ago

Connecting different width and clock master to slave in QSYS

Hi Guys, I have an Axi master which is 256 bit running at 125 Mhz and I want to connect this to an AXI slave which is 128-bit running at 250 Mhz. How can I do this in Qsys and ensure that wh...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

You need to manually insert a clock domain crossing bridge into your Qsys project. It won't be done automatically by QSYS. Extra glue logic isn't needed.