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treble99's avatar
treble99
Icon for New Contributor rankNew Contributor
3 years ago

Connecting Avalon Streaming signals to Signal Tap Logic Analyzer

Hello, I am trying to simulate PCIe_DDR4 example provided for Terasic DE5a-NET DD4(Intel Arria 10 GX FPGA (10AX115N2F45E1SG)). I have made a modification to the project. After opening it in Quart...
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RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Agreed with sstrell, we recommend users to use Signal Tap GUI.

Please checkout this user guide on how to add the signal tap into your project.

Reference Link: https://www.intel.com/content/www/us/en/docs/programmable/683819/22-4/creating-a-instance-with-the-gui.html


Best Regards,

Richard Tan


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