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Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- Thanks Dave, you gave me the boost I needed. --- Quote End --- Great! Sometimes you just need a little encouragement :) --- Quote Start --- I'm using the red BeMicro. --- Quote End --- Ok, I have this board. Its USB-Blaster JTAG interface is non-standard, and sometimes troublesome. --- Quote Start --- I found this pdf, http://www.altera.co.uk/literature/tt/tt_my_first_fpga.pdf . I followed the instructions and managed to connect some cores together. Felt great :). --- Quote End --- Excellent. In VHDL, you can put component definitions in packages and then "use" the package, or you can define a component locally. --- Quote Start --- I haven't tried ALTPLL_RECONFIG core as the ALTPLL has an option to add extra configuration pins to the same core and that's where I got stuck. But I'll take a look at the link you posted. I'm sure I'll find the necessary information. I only used Modelsim once but I'll practice with it too. Thanks for all the help so far. I'll keep you posted. --- Quote End --- This thread has a basic Modelsim simulation example http://www.alteraforum.com/forum/showthread.php?t=45770 Cheers, Dave