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Altera_Forum's avatar
Altera_Forum
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12 years ago

compiling a design that instantiate 4096 times the same module

Hi, I'm writing a vhdl top code that instantiates 4096 the same module (using vhdl generate statement). The module consists in a RAM, plus an adder and some other logic ... and 4096 of them sat...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Btw, using a generate loop is the only way to place it. Logic locks just lock down existing code. and partitions are just pre-compiled code. But you still need the code.