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Altera_Forum
Honored Contributor
12 years agoThe 'center < to_unsigned()' itself returns a boolean which doesn't comply with your specified unsigned return type.
The function specification always specifies an unconstrained returned object, but it is up to you to return a properly constrained object at the exit of the function. You may want to get hold of a good introductory book to VHDL like e.g. "Circuit Design with VHDL" by Volnei A. Podroni.