Close Timing on FIR filter designs in Cyclone V

Are these filters hand-built, or Altera provided? Are they symmetric, or generic? Are the taps adjustable post-synthesis or fixed? All of these questions come into play with FIR designs, and can make the difference between a design that can be implemented and one that will never meet timing.

You might also find that a FIR can easily be broken into multiple FIR's operating in parallel--one on the odd samples and one on the even samples. You'd need to apply four separate FIR's to do this, assuming that you aren't adjusting your data rate--even taps applied to even samples, odd taps to even samples, even taps to odd sampless, etc. This would drop your system clock rate down to 100MHz, and might help you make timing--at the expense of twice the area.

Fixed tap filters can also be easier to implement. When the tap is small, you might not need a full 14x12 bit multiply. Perhaps the tap is zero, and you don't need the tap at all.

Some things to consider,

Dan