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Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Clock missing from Timing Analyzer - Report Setup Summary

I have a clock mux along the lines in "ug-qps-03-design-recommendations.pdf" I have set the output clock to be a Global Clock in the Assignment Editor and I give it's minimum period in the sdc file....
Timing
Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

I'm sorry, I don't quite follow the philosophy.

The HDMI_TX_CLK is the output from a clock multiplexer that is fed by a couple of PLLs producing a total of 4 clocks, namely standard video clocks, the fastest being 150MHz.

The clock signal feeding the PLLs is a single 25MHz clock.

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

Do all the clocks of the PLL (input reference, output clocks) appear in the clocks report (Report Clocks)?