Forum Discussion

Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Clock missing from Timing Analyzer - Report Setup Summary

I have a clock mux along the lines in "ug-qps-03-design-recommendations.pdf" I have set the output clock to be a Global Clock in the Assignment Editor and I give it's minimum period in the sdc file....
Timing
Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Those false paths were the ones setup in Timing Analyzer by default and placed in the sdc file. All I did was add HDMI_TX_CLK into the "Create Clock" group in the sdc file.

I have no idea why it would do that and I don't recognise the names.

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

So you should run detailed timing reports with Report Timing, setting the launch or latch clock as HDMI_TX_CLK to find paths clocked by this clock domain.

  • Mikexx's avatar
    Mikexx
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Thanks.

    If I go to Custom Reports -> Report Timing I an enter HDMI_TX_CLK into the from and to clock. These exist in the pull-down option.

    I placed * in the targets entry, leave it blank, or add all registers in the design. I get "Nothing to report" for all options.

    Not sure if it makes a difference bu I'm using Quartus Prime Version 20.1.0 Build 711 06/05/2020 SJ Lite Edition