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Mikexx's avatar
Mikexx
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2 years ago

Clock missing from Timing Analyzer - Report Setup Summary

I have a clock mux along the lines in "ug-qps-03-design-recommendations.pdf" I have set the output clock to be a Global Clock in the Assignment Editor and I give it's minimum period in the sdc file....
Timing
Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Many thanks.

The "Report Clocks" does list this clock as I would expect.

HDMI_TX_CLK, or some variant of it, is clocking a lot of logic other pins are dependent on this and are behaving as expected. The same signal is used throughout the design so how can I check that setup and hold times aren't violated?