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OrF's avatar
OrF
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

CLK-30028 - Invalid Generated Clock

Hi I'm trying to define generated clock out of the pll. and I get the following violation notification "CLK-30028: Invalid Generated Clock" https://www.intel.la/content/www/xl/es/programmable/quar...
Timing
TingJiangT_Intel's avatar
TingJiangT_Intel
Icon for Contributor rankContributor
2 years ago

Hi there, sorry for the first point it's a typo.​

And for the second point, what I mean is the as it is s10, so the drive_pll_clock constraint will be applied automatically.

For the third point, can you help specify which path you concern. You can report timing of the path by set the 'from node' and 'to node' in the analyzer, just show the nodes you need is fine.