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OrF's avatar
OrF
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

CLK-30028 - Invalid Generated Clock

Hi I'm trying to define generated clock out of the pll. and I get the following violation notification "CLK-30028: Invalid Generated Clock" https://www.intel.la/content/www/xl/es/programmable/quar...
Timing
TingJiangT_Intel's avatar
TingJiangT_Intel
Icon for Contributor rankContributor
2 years ago

Hi there. From the project you uploaded, I notice that the generated clock pll_clk is constrained cuccssgully.

I'm not really sure about if this is where you point are. As you are using Stratix 10, I think the drive_pll_clock is applied automatically. And there are no related ignored SDC in the report.