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OrF
Occasional Contributor
Occasional ContributorCDC-50001 - 1-Bit Asynchronous Transfer Not Synchronized
the Quartus STA reports "CDC-50001 - 1-Bit Asynchronous Transfer Not Synchronized" sync-fifo in my design . at this document "AN 919: Improving Quality of Results with Design Assistant" :https://...
OrFOccasional Contributor
Occasional ContributorHi ,
I understand your solution - Thanks! , but your last sentence is not clear "though I'd recommend adding a register because it is much more common to have 2 registers in a row throughout your design so there would be a better chance of chains getting mis-identified."
I DO have 2 registers in a row ... ( and yes all my design has 2 registers ) so I assume the recommendation should be reduce the "chain length settings" to 2 ?
Or.
