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name is "numeric_std" without that extra unsigned
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numeric_std_unsigned is basically the VHDL standard version of the synopsys package std_logic_unsigned. it allows you to treat std_logic_vectors as unsigned values. it was added in VHDL 2008, along with numeric_std_signed.
Quartus does only support minor features of VHDL 2008 - mostly just the easier to use features (like generates and case statement changes). Support for anything useful and major like the new packages has not arrived (and Im guessing unlikely to arrive until some major customers request it).
The (small) list of supported features can be found here:
http://quartushelp.altera.com/15.0/mergedprojects/hdl/vhdl/vhdl_list_2008_vhdl_support.htm Vivado now has better 2008 support (though it's still nowhere near complete).
If you really must have 2008 support - I think synplyfy has it.
Honored Contributor
