Can't resolve multiple constant drivers?

I shortened my code to this:

BEGIN
--4 rotation
stage0: busmux4to1 PORT MAP(shiftRight & shift(2),aluIn,aluIn(11 DOWNTO 0) & aluIn(15 DOWNTO 12),aluIn,aluIn(3 DOWNTO 0) & aluIn(15 DOWNTO 4),alu1);
--2 rotation
stage1: busmux4to1 PORT MAP(shiftRight & shift(1),alu1,alu1(13 DOWNTO 0) & alu1(15 DOWNTO 14),alu1,alu1(1 DOWNTO 0) & alu1(15 DOWNTO 2),alu2);
--1 rotation
stage2: busmux4to1 PORT MAP(shiftRight & shift(0),alu2,alu2(14 DOWNTO 0) & alu2(15),alu2,alu2(0) & alu2(15 DOWNTO 1),aluOut);
END Structure;

I can't make it any shorter b/c I'm not allowed to use the rotate command (only structural vhdl allowed). Here's a picture of the results I'm dealing with (its a functional simulation, not timing). The relevant things to look at are aluInputA and aluOutput. ctrl_optype tells if its left or right shift (6 is left, 7 is right) and shiftamt is binary representation of how much to rotate by. Its hard to see from the picture but all of the left shifts didn't occur and all of the right shifts were by only one bit

http://img165.imageshack.us/img165/8480/resultsps3.png