Can't resolve multiple constant drivers for net "enableit" error

Error (10028): Can't resolve multiple constant drivers for net "enableit" at Transmit6.vhd(156)
	signal enableit : STD_LOGIC;
	signal dropornot : STD_LOGIC;
	signal rxdv2 : STD_LOGIC;
	signal txdata8 : STD_LOGIC_VECTOR(7 DOWNTO 0);
	signal rxdata8 : STD_LOGIC_VECTOR(7 DOWNTO 0);
	
	signal rxdata_4b:	std_logic_vector(3 downto 0);
	signal rxdv_4b:	std_logic;
	signal txdata_4b:	std_logic_vector(3 downto 0);
	signal txen_4b:	std_logic;
	signal col2 : STD_LOGIC;
	signal reset2 : STD_LOGIC;
	signal CheckSumResult : STD_LOGIC_VECTOR (31 DOWNTO 0);
	signal CheckSumValid : STD_LOGIC;
	constant disableit : STD_LOGIC := '0';
	constant emptytwobits : STD_LOGIC_VECTOR (1 DOWNTO 0) := "00";
	--constant whilelooptrue :STD_LOGIC := '1';
begin
	enableit <= '1';
	H2:CRCGen port map( clk	=> CLOCK_50, --: IN STD_LOGIC;
		data	=> payload, -- : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
		datavalid	=> enableit, --: IN STD_LOGIC;
		empty	=> emptytwobits ,--: IN STD_LOGIC_VECTOR (1 DOWNTO 0);
		endofpacket	=> enableit, --: IN STD_LOGIC;
		reset_n	=> disableit, --: IN STD_LOGIC;
		checksum	=> CheckSumResult, --: OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
		crcvalid	=> CheckSumValid --: OUT STD_LOGIC
	);
	H1:ethernet port map ( 
		rxclk => CLOCK_50,			-- receive clocks
		txclk => CLOCK_50,			-- transmit clocks
		-- rx inputs
		rxdata_4 => rxdata_4b,
		rxdv_4 => rxdv_4b,			-- receive data valid
		-- tx outputs
		txdata_4 => txdata_4b,
		txen_4 => txen_4b,		-- tx enable
		-- status inputs
		col => col2,			-- collision indicators
		-- system clock;
		clk => CLOCK_50,
		reset => reset2,
		-- faster clock used for synchronization
		sync_clk => CLOCK_50,
		-- data I/O
		rxdata => rxdata8,	-- 8 bits wide
		rxdv => rxdv2,			-- receive data valid
		txdata => txdata8,	-- 8 bits wide
		txen	=> enableit,
		-- status outputs
		drop => dropornot	-- indicates the current frame should be dropped
		);
	process(CLOCK_50)
	VARIABLE last_clk : std_logic := '0';
	VARIABLE counter : integer := 0;
	VARIABLE last_counter : integer := 0;
	
	begin
	--while (whilelooptrue = enableit) loop
	
		if SW(0) = '1' then
			enableit <= '1'; -- Error happen here
			if (CLOCK_50 = '0') AND (last_clk = '1') then
				
				if (counter = 0) then
					txdata8 <= preamble;
				end if;
				if (counter = 1) then
					txdata8 <= preamble;
				end if;
				if (counter = 2) then
					txdata8 <= preamble;
				end if;
				if (counter = 3) then
					txdata8 <= preamble; --end
				end if;
				if (counter = 4) then
					txdata8 <= preamble;
				end if;
				if (counter = 5) then
					txdata8 <= preamble;
				end if;
				if (counter = 6) then
					txdata8 <= preamble;
				end if;
				if (counter = 7) then
					txdata8 <= SFD;
				end if;
				if (counter = 8) then
					txdata8 <= dest_mac_addr1;
				end if;
				if (counter = 9) then
					txdata8 <= dest_mac_addr2;
				end if;
				if (counter = 10) then
					txdata8 <= dest_mac_addr3;
				end if;
				if (counter = 11) then
					txdata8 <= dest_mac_addr4;
				end if;
				if (counter = 12) then
					txdata8 <= dest_mac_addr5;
				end if;
				if (counter = 13) then
					txdata8 <= dest_mac_addr6;
				end if;
				if (counter = 14) then
					txdata8 <= src_mac_addr1;
				end if;
				if (counter = 15) then
					txdata8 <= src_mac_addr2;
				end if;
				if (counter = 16) then
					txdata8 <= src_mac_addr3;
				end if;
				if (counter = 17) then
					txdata8 <= src_mac_addr4;
				end if;
				if (counter = 18) then
					txdata8 <= src_mac_addr5;
				end if;
				if (counter = 19) then
					txdata8 <= src_mac_addr6;
				end if;
				if (counter = 20) then
					txdata8 <= wholepacketlength1;
				end if;			
				if (counter = 21) then
					txdata8 <= wholepacketlength2;
				end if;			
				if (counter = 22) then
					txdata8 <= payload;
				end if;			
				if (counter = 23) then
					txdata8 <= emptyhex;
				end if;			
				if (counter = 24) then
					txdata8 <= X"10";--CheckSumResult;
				end if;
				
				last_counter := counter;
				counter := counter + 1;
			end if;
			
			if (CLOCK_50 = '1') AND (last_clk = '0') then
				if (counter >= 25) then
					enableit <= '0';
				end if;
			end if;
		else
			enableit <= '0';
		end if;
	--end loop;
	last_clk := CLOCK_50;
	end process;
end architecture transmitarch;