Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Can't fit design in device after upgrade from 13.0SP1 to 13.1

Hi,

I have a project for the MAX V "5M240ZM100C5" CPLD, almost at the max capacity of the device.

Previously I was using 32bit PC, Windows 7 and Quartus II 13.0 SP1 Web Edition, and was able to successfully compile and fit the design on the device.

Here is a piece of the log from the Fitter: 


Info: Running Quartus II 32-bit Fitter    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
...
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off InterfaceLogic -c InterfaceLogic
Info: qfit2_default_script.tcl version:# 1
...
Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
...
Info (332144): No user constrained base clocks found in the design
Info (332128): Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
    Info (332127): Assuming a default timing requirement
Info (332111): Found 5 clocks
...
Info (186079): Completed User Assigned Global Signals Promotion Operation
...
Info (186079): Completed Auto Global Promotion Operation
Info (176234): Starting register packing
Info (186391): Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info (186468): Started processing fast register assignments
Info (186469): Finished processing fast register assignments
Info (176235): Finished register packing
Info (171121): Fitter preparation operations ending: elapsed time is 00:00:01
Info (170189): Fitter placement preparation operations beginning
Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:00
Info (11888): Total time spent on timing analysis during the Fitter is 0.02 seconds.
Info (170216): Fitter cannot place all nodes on current device -- Fitter will automatically make another fitting attempt and tightly pack logic elements
Info (176234): Starting register packing
Info (186391): Fitter is using Minimize Area packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info (186468): Started processing fast register assignments
Info (186469): Finished processing fast register assignments
Info (176235): Finished register packing
Info (171121): Fitter preparation operations ending: elapsed time is 00:00:00
Info (170189): Fitter placement preparation operations beginning
Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:00
Info (11888): Total time spent on timing analysis during the Fitter is 0.02 seconds.
Info (170216): Fitter cannot place all nodes on current device -- Fitter will automatically make another fitting attempt and tightly pack logic elements
Info (176234): Starting register packing
Info (186391): Fitter is using Minimize Area with Chains packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info (186468): Started processing fast register assignments
Info (186469): Finished processing fast register assignments
Info (176235): Finished register packing
Info (171121): Fitter preparation operations ending: elapsed time is 00:00:01
Info (170189): Fitter placement preparation operations beginning
Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:00
Info (170191): Fitter placement operations beginning
Info (170137): Fitter placement was successful
Info (170192): Fitter placement operations ending: elapsed time is 00:00:01
Info (170193): Fitter routing operations beginning
Info (170195): Router estimated average interconnect usage is 28% of the available device resources
    Info (170196): Router estimated peak interconnect usage is 28% of the available device resources in the region that extends from location X0_Y0 to location X8_Y5
Info (170194): Fitter routing operations ending: elapsed time is 00:00:01
Info (170202): The Fitter performed an Auto Fit compilation.  No optimizations were skipped because the design's timing and routability requirements required full optimization.
Info (11888): Total time spent on timing analysis during the Fitter is 0.55 seconds.
Info (11218): Fitter post-fit operations ending: elapsed time is 00:00:00
...
Info: Quartus II 32-bit Fitter was successful. 0 errors, 3 warnings

On the report I have a total of logic elements of 150 / 160 ( 94 % ).

Now I bought a new PC i7 64bit, Windows 8.1 64bit and installed the Quartus II 13.1 Web Edition.

And now the compilation fails at the Fitter, for the log it seems that no optimization is atempted: 


Info: Running Quartus II 64-Bit Fitter
    Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
...
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off InterfaceLogic -c InterfaceLogic
Info: qfit2_default_script.tcl version:# 1
...
Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
...
Info (332144): No user constrained base clocks found in the design
Info (332128): Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
    Info (332127): Assuming a default timing requirement
Info (332111): Found 5 clocks
...
Info (186079): Completed User Assigned Global Signals Promotion Operation
...
Info (186079): Completed Auto Global Promotion Operation
Info (176234): Starting register packing
Info (186468): Started processing fast register assignments
Info (186469): Finished processing fast register assignments
Info (176235): Finished register packing
Info (171121): Fitter preparation operations ending: elapsed time is 00:00:01
Info (170189): Fitter placement preparation operations beginning
Error (170011): Design contains 178 blocks of type logic cell.  However, the device contains only 160 blocks.
Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:00

So I did some testing to find out if I can manage to solve this issue, I checked the settings and it seemed to be identical on both setups.

Running the 32bit of 13.1 also got the same issue.

Then I tried downloading the version 13.0 SP1 Web Edition again for the new PC, and successfully fitted the design.

Did this happened to someone?

Is this situation normal, due to new license limitations or something, or do I need to change any settings in the software?

Thank you

15 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Also I wanted to know, if because of the optimizations necessary the normal functioning of the design can be compromised?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Hi Ferre:

    13.1 is a pretty significant re-write of quartus. Although there are some optimization differences between the web and licensed version. I think these are mainly associated with placement, not logic optimizations.

    I would open a support case with Altera. Or if you are willing to post the design I can compile it with 13.1 64 bit licensed version and see if it makes a difference in the fitting.

    Quartus has a way to generate .QAR files which is basically a compressed project file with all the sources. So that would probably be the way to go.

    Pete
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Have you tried compiling it across several different seeds?

    Try using standard fit instead of auto-fit?

    Increase the placement effort multiplier value?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Hi Pete,

    Yes, I didn't taught the differences were so significant, but it seems they are.

    I would be very appreciated for you to try the compilation, although I'm not allowed to share the design due to a non-disclosure agreement.

    I think that I'll open a support case, just to figure this out, since at least with the 13.0SP1 version I can work with the design.

    Thank you

    Pedro Ferreira
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Skyjuice88,

    I tried with several seeds, also failed all with the same amount of exceeding logic cells.

    What I believe that changing the seeds affects, is the timing performance and not the size in logic cells, correct me if I'm can be wrong.

    The Standard fit I also had tried before, with no change. It seems that all the changes that I made on the Fitter settings didn't take any effect.

    I tried with a placement effort multiplier of 4, no luck.

    Thank you
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    I think the key might be this line from 13.0:

    Info (176234): Starting register packing

    Info (186391): Fitter is using Minimize Area with Chains packing mode for logic elements with Auto setting for Auto Packed Registers logic option

    In 13.1, Quartus does retry register packing with multiple different options for Max V devices, as it did in the past. Try changing the register packing mode to "Minimize Area with Chains" and see if that helps.

    Cheers, A
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    --- Quote Start ---

    I think the key might be this line from 13.0:

    Info (176234): Starting register packing

    Info (186391): Fitter is using Minimize Area with Chains packing mode for logic elements with Auto setting for Auto Packed Registers logic option

    In 13.1, Quartus does retry register packing with multiple different options for Max V devices, as it did in the past. Try changing the register packing mode to "Minimize Area with Chains" and see if that helps.

    Cheers, A

    --- Quote End ---

    Man you are Jesus!

    Yes it really worked!

    I had given up on this, and was using the old version.

    I feel it strange since ALL of the settings of all categories were exactly the same between versions 13.0 SP1 and 13.1, and in the old version it worked but not in the new...

    It seems that the Auto varies between 13.0 and 13.1.

    So I had to change the Settings->Fitter Settings->More Settings->Auto Packed Registers->Minimize Area with Chains.

    Also I can report a simple visual bug on the software. When you change the option from Auto to other and press the Reset button, a second AUTO (in caps) appears as an option.

    https://www.alteraforum.com/forum/attachment.php?attachmentid=8406
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    I'm afraid I'm the one who made that change to the behaviour of auto packed registers (I'm a software engineer at Altera). For reasons that aren't really worth getting into, there was a lot of code to support that one optimization for Max V devices (and *only* Max V) that was, believe it or not, preventing us from making some much-needed changes to support Arria 10 devices.

    If you highlight the error message and click F1, you should get help that's shown here: http://quartushelp.altera.com/13.1/mergedprojects/msgs/msgs/efitapi_fitapi_vpr_status_failed_too_many_bles.htm. (Hmm, just noticed a missing space - embarrassing. I just fixed it for the next release).

    We thought that this text would be enough to point people in the right direction - but I suppose that not everyone knows that you can get more help on every message. Did you know about this feature? Would you have noticed if we put a submessage below the error message? Or if there had been a mouseover if you hovered over the error message, telling you to hit F1?

    Thanks for reporting that visual bug - I think I see the problem though I'm not 100% sure. I'll report it to the team that owns it and hopefully they'll have it fixed for the next release.

    Cheers, A
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Hi Aludwin,

    It's great to know that developers are here in the forums helping!

    --- Quote Start ---

    We thought that this text would be enough to point people in the right direction - but I suppose that not everyone knows that you can get more help on every message. Did you know about this feature? Would you have noticed if we put a submessage below the error message? Or if there had been a mouseover if you hovered over the error message, telling you to hit F1?

    --- Quote End ---

    No, unfortunately I didn't knew that you could use the help on every message.

    And even knowing I think the 1st thing that I would do is google for the solution.

    Maybe that's my fault, but the help, wasn't even an solution for this issue. After googling a lot to find the cause, I went to the forum to ask for the solution.

    I didn't consult the help. From now on, most certainly I will since, at least in Quartus software, there is useful information.

    The best way in my opinion, would be to put a submessage with some information like "Select a larger device or reduce the number of logic cells in your project. For MAX V devices hit F1".

    I read the full log, scrolling down, not passing the mouse over each error, the hover can be useful to be there, but not the best solution I think.

    Cheers

    Pedro Ferreira
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    --- Quote Start ---

    Man you are Jesus!

    Yes it really worked!

    I had given up on this, and was using the old version.

    I feel it strange since ALL of the settings of all categories were exactly the same between versions 13.0 SP1 and 13.1, and in the old version it worked but not in the new...

    It seems that the Auto varies between 13.0 and 13.1.

    So I had to change the Settings->Fitter Settings->More Settings->Auto Packed Registers->Minimize Area with Chains.

    Also I can report a simple visual bug on the software. When you change the option from Auto to other and press the Reset button, a second AUTO (in caps) appears as an option.

    http://www.alteraforum.com/forum/attachment.php?attachmentid=8406&stc=1

    --- Quote End ---

    Hi!

    I encounter a problem, namely Fitter was unsuccessful

    Following picture is sub message from Compilation report of Quartus

    http://www.alteraforum.com/forum/attachment.php?attachmentid=9702&stc=1

    Can you give me a way to solve this problem/

    Thank you so much!