New Contributor
Super ContributorWhat options are you using in Report Timing to try to find the nets? Is your design fully constrained for timing with a .sdc file (clocks and I/O at a minimum)?
New ContributorThe only options I'm using in Report Timing are the "from" clock and "To" clocks, "Setup" is selected, "Detail level" is "Full path". In the Targets section, I then click the From search button.
In the Name Finder that pops up, I select get_pins and a filter of *rom*. My ROMs have instance names of rom0, rom1 and rom2. When I click the List button I get the data outputs for rom0 and rom1 and nothing for rom2. I should see 256 data outputs for each ROM, but I only get the outputs for rom0 and rom1.
Yes, I have my SDC file setup with clocks and I/O ports.
Super ContributorWhere is the output of that third ROM going? Other logic or to output pins? There must be something incorrect in your filtering for the report to not be seeing these paths.
I presume you are using the post-fit (Standard edition) or final (Pro) timing netlist.
New ContributorAll three ROMs are at the start of very similar signal chains, only the ROM contents are different. I'm using the ROMs without an output register and they all parallel load some shift registers.
Yes, I'm using the post-fit timing netlist. Like I said, the Quartus Node Finder finds the ROM outputs for all 3 ROMs in the post-fit netlist.
