Altera_Forum
Honored Contributor
14 years agocan't find 'clk' pin using get_pins in timequest timing analyzer
using quartus 11.1 build 216 w/service pack 1. My design uses LPM_ADD_SUB components, with the results output registered (not the pipeline registers in the component). I am trying to do report_path in timequest timing analyzer, to see the delay from my clock pin to one of the registers that is at the output of the LPM_ADD_SUB's 'result' output pin. However, when I try to find the 'clk' pin using the name finder, I can't see the 'clk' pins - only the datapath pins to the LE associated with the register. In chip planner, I can clearly see the registers, so I know they are there and not optimized away.
has anyone else had this problem? any solutions?