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Altera_Forum's avatar
Altera_Forum
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14 years ago

can't find 'clk' pin using get_pins in timequest timing analyzer

using quartus 11.1 build 216 w/service pack 1. My design uses LPM_ADD_SUB components, with the results output registered (not the pipeline registers in the component). I am trying to do report_path...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Well, my situation turned out to be a register that wasn't driving anything. In the process of creating my design, I had registers that were not driving any logic or outputs. I think this is a bug in the timing analyzer.

If this is your situation, either send the output of the register to a pin on your device, or create a virtual output and drive that.