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In Classic Timing Analysis, the equation of the slack is Required-actual,it is OK when it is positive and its not when negative. From the configuration of the tsu in quartus ii, we get that we can define the maxium ,not the minium ,of the its value.I am wandering why,because,you know,the longer,the better for the tsu in the condition of not surpassing the clock period.
Any comments will be OK.
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Hi JohnRita,
defining a tsu should gurantee that the input data is capatured correctly by your FPGA. That means you have to consider the output timing of the source which drives yor FPGA ! Assuming that the source devcie and the FPGA are driven by the same clock and the clock delay is 0:
clkperiod 20ns
driving device tco 5ns
That means the data at the inputs of the FPGA are stable 5ns after the rising clock edge.
With a clockperiod of 20ns your FPGA has 15ns left as setup time.
Kind regards
GPK
Honored Contributor
