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Altera_Forum's avatar
Altera_Forum
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12 years ago

can someone help on this

Hi all, I am working on a finite state machine assignment. I have the following code below which i want key_0, key_1, key_2 and key_3 to influence the out LEDR[1..0] and LEDG[1..0]. key_0 and ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Another tip - do not define a NULL others case in an asynchronous process, you risk producing latches- but you are already producing latches by not assigning LEDR and LEDG in ALL states (the synthesisor may have removed locked and unlocked for being states that cannot be entered, and hence no latch warnings).