Forum Discussion
okhajut
New Contributor
New ContributorCan Quartus Prime Platform Designer Verification IP only be used for Intel/Altera designs?
The Intel Quartus Prime Platform Designer contains several verification IP for for AXI bus and also clock and reset BFM. Here is the image: The AXI is also used in Xilinx designs and Micro...
ShengN_altera
Super Contributor
Super ContributorHi,
Yes Questasim, Active-HDL etc, I mean the supported simulator and vendor check this link for the list https://www.intel.com/content/www/us/en/docs/programmable/683870/24-1/supported-simulators.html
