Forum Discussion

okhajut's avatar
okhajut
Icon for New Contributor rankNew Contributor
2 years ago

Can Quartus Prime Platform Designer Verification IP only be used for Intel/Altera designs?

The Intel Quartus Prime Platform Designer contains several verification IP for for AXI bus and also clock and reset BFM. Here is the image: The AXI is also used in Xilinx designs and Micro...
Simulation
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

Hi,


Are these IP available in the free web version of the design?

Yes, these IPs are available in the Quartus Lite Version.


More importantly, can these IP be used when developing a design that is not targeted to Intel device or the licence prevents that?

These bfm IPs can be used with third party ip or design on simulation functionality check. But, the third-party ip or design need to be included in Quartus and simulated using Quartus simulator tool. Because these bfm IPs are dependent on Quartus simulator tool (libraries, license, .etc)


Thanks,

Regards,

Sheng