Forum Discussion
Hi,
please go through bellow case. It will help you.
I might have not explained the whole case clearly,sorry.
So here are my questions , in a simplified manner:
.I was making use of oneapi to deploy the development flow(using quartus prime lite + bsp) onto my de1-soc.
. I was not planning to download the bsp for the de1-soc from an intel source since it is not supported and the bsp simply isnt present for downaload.
.My idea was to use oneapi to generate an RTL file of the hough transform(sycl - on jupyterLabs) and then use that rtl file to generate a custom bsp from quartus prime lite.
. If I am not able to generate an RTL file off oneapi for a provided SYCL script, could I do it for a sample program like vectoradd which is provided from the oneapi-cli menu? or is it not possible to do so at all? Is my plan to use the development flow by generating a custom bsp from quartus prime after generating an RTL file from oneapi not valid at all?
. I would then proceed to deploy the bitstream onto my de1-soc after the above steps.
Please let me know if my plan to integrate this particular flow is reasonable. If it is, can I please know how to start off with this process? I really have no idea how to start off to convert the SYCL code into a rtl file using oneapi. Although I am familiar with deploying logic onto the de1-soc after retrieving the .sof file( I have experience working with quartus prime and qsys to deploy logic onto my de1-soc) but my project now ,is to develop and deploy projects onto boards using oneapi instead of qsys and quartus.