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In theory if you only change the contents of the mif file, you should only have to run the assembler to get an updated fpga image and shouldn't need to run a full compilation. In practise, from the tests I made a few years ago, sometimes it works, sometimes it doesn't (the FPGA image is regenerated with the old data).
If you enable smart compilation, the compilation should be a lot faster if you only change the .mif file, as Quartus should detect that it doesn't need to recompile the rest.
To use the memory content editor, you need to enable its support explicitly in the Megawizard, and it will only work with single port memories (the memory editor feature uses the second port). But please note that contrary to modifying the mif file, any editing through the memory content editor is temporary. It only modifies the memory contents in the FPGA. As soon as you reconfigure the FPGA through JTAG or cycle the power, your modifications will be lost.
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Thanks for showing various options. I am just wondering, can't we make some.tcl file which will compile only these two files. I would prefer if I could control the timing of this partial compilation with MATLAB when I can put these command in a loop. did you ever tried anything like it?
Thanks
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