Forum Discussion
Altera_Forum
Honored Contributor
8 years agoCalling a function from a function is no problem in VHDL. You can nest functions in any levels of functions. And it will simulate not problem (just dont make some infinitely recursive function)
The problem may come in synthesis - your code needs to map to some real hardware. As long as this is the case, then no problem. But if you're trying to be too clever, it may not synthesise. Post some code that has a problem to discuss further.