building example kernel aocx files fails for bittware s5phq

Unterhausen,

It looks like the iface.ipx file in the s5phq_d8 directory isn't the correct one. We're updating the BSP zip file on our developer site now, but you can just take the iface.ipx from any other s5phq_xx folder and replace the one in your D8 folder as they are all the same and only the d8 folder has a bad one.

Ron

I downloaded the new files and hello_world works with the bittware generated kernel. However, when I try to build it myself, it fails to run from the host program

I had to copy the iface.ipx file from another folder because that problem persists

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Using AOCX: hello_world.aocx

MMD INFO : [acl0] New FPGA design has different periphery from programmed design.

MMD INFO : AOCX base and CvP periphery hashes differ. Programming will fail in hardware, so aborting.

MMD INFO : executing "quartus_pgm -c 1 -m jtag -o "P;reprogram_temp.sof@1""

'quartus_pgm' is not recognized as an internal or external command,

operable program or batch file.

'quartus_pgm' is not recognized as an internal or external command,

operable program or batch file.

'quartus_pgm' is not recognized as an internal or external command,

operable program or batch file.

MMD INFO : Link currently operating at 5 GT/s.

MMD INFO : Link operating at Gen 2 with 8 lanes.

MMD INFO : Expected peak bandwidth = 4000 MB/s

mmd program_device: Board reprogram failed

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I downloaded the new files and hello_world works with the bittware generated kernel. However, when I try to build it myself, it fails to run from the host program

I had to copy the iface.ipx file from another folder because that problem persists

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Looks like you need to set your PATH environment variable : export PATH=$PATH:$ALTERAOCLSDKROOT/bin:"/opt/altera/14.0/quartus/bin" (replace the path to match to your own setup).

I was thinking that the path issue wasn't the problem because it gives an error before that, but I'll have to fix the path problem and see

took me a while to realize that I needed to restart visual studio to get the path changes I had made to come into effect. I fixed that and it still doesn't work. Programming cable is fine, I think the problem is where it decides to abort the process

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Querying platform for info:==========================

CL_PLATFORM_NAME = Altera SDK for OpenCL

CL_PLATFORM_VENDOR = Altera Corporation

CL_PLATFORM_VERSION = OpenCL 1.0 Altera SDK for OpenCL, Version 14.0

Querying device for info:

========================

CL_DEVICE_NAME = s5phq_d8 : S5PHQ

CL_DEVICE_VENDOR = Bittware Inc

CL_DEVICE_VENDOR_ID = 4466

CL_DEVICE_VERSION = OpenCL 1.0 Altera SDK for OpenCL, Version 14.0

CL_DRIVER_VERSION = 14.0

CL_DEVICE_ADDRESS_BITS = 64

CL_DEVICE_AVAILABLE = true

CL_DEVICE_ENDIAN_LITTLE = true

CL_DEVICE_GLOBAL_MEM_CACHE_SIZE = 32768

CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE = 0

CL_DEVICE_GLOBAL_MEM_SIZE = 0

CL_DEVICE_IMAGE_SUPPORT = false

CL_DEVICE_LOCAL_MEM_SIZE = 16384

CL_DEVICE_MAX_CLOCK_FREQUENCY = 1000

CL_DEVICE_MAX_COMPUTE_UNITS = 1

CL_DEVICE_MAX_CONSTANT_ARGS = 8

CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE = 2147483648

CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 3

CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 8192

CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE = 1024

CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR = 4

CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT = 2

CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT = 1

CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG = 1

CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT = 1

CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE = 0

Command queue out of order? = false

Command queue profiling enabled? = true

Using AOCX: hello_world.aocx

MMD INFO : [acl0] New FPGA design has different periphery from programmed design.

MMD INFO : AOCX base and CvP periphery hashes differ. Programming will fail in hardware, so aborting.

MMD INFO : executing "quartus_pgm -c 1 -m jtag -o "P;reprogram_temp.sof@1""

Error (213013): Programming hardware cable not detected

Error (213013): Programming hardware cable not detected

Error (213013): Programming hardware cable not detected

MMD INFO : Link currently operating at 5 GT/s.

MMD INFO : Link operating at Gen 2 with 8 lanes.

MMD INFO : Expected peak bandwidth = 4000 MB/s

mmd program_device: Board reprogram failed

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