Block Design file issue

Thanks for answering,

I'm a newbie to Quartus II. I have not idea what's a symbol file is and how to interconnet all these files together. I only know VHDL and the traditional ways used with a standard software as I've used before using Quartus. And since Altera did not provide simple examples on how to do that for starter users, I'll have to struggle like anybody else has done before me.

I'll try your way and I let you know when I get results. But before, I'll have to learn what these all new files types are exactly and implement my very simple study project whit them.

Regards,