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Altera_Forum's avatar
Altera_Forum
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17 years ago

Blacl Box synthesis attribute

Im trying to tell the Quartus 2 synthesiser that my component is a black box so it doesnt complain that it cant find the entity declaration. Ive tried all of the following in the VHDL top level: ...
Altera_Forum's avatar
Altera_Forum
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17 years ago

That flow works for synthesis and P&R. I don't know what happens if you don't add the empty partition assignment, i.e. if it keeps all the port connections or rips out everything since they don't drive anything. It might keep them, but not sure. If you have the web edition, I don't think you have incremental compilation/partition access, but if you do it's real easy to add that in.