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Altera_Forum's avatar
Altera_Forum
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17 years ago

Blacl Box synthesis attribute

Im trying to tell the Quartus 2 synthesiser that my component is a black box so it doesnt complain that it cant find the entity declaration. Ive tried all of the following in the VHDL top level: ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I dont want to P&R it, I just want to synthesise with a black box in place.

This isnt the entire TL as a black box - a component called at the top level I want to be a black box (so other stuff is synthesized, this component isnt, for now).