Bitstream generation for Stratix-V chips

Hi,

I'm using Quartus 11.0SP1 to build a Stratix-V design. I'm getting the following message during Assembler stage:

info: compilation report contains advance information. specifications for device 5sgxea7k2f40c2es are subject to change. contact altera for information on availability. no programming file will be generated.

I tried other S-V chips and tool options - still, Quartus refuses to generate the bitstream.

Also, a couple of example designs were built with exactly the same tool version.

I opened a service request with Altera, but it's kind of slow.

Any help is appreciated.

Thanks,

Evgeni