Tricky, I really appreciate your help.
Here's the code. It's just a small test I'm doing to find the best way to do what I need.
All this is suposed to do is send the input(entrada) to the output(saida).
---------PACKAGE---------
LIBRARY ieee;
USE ieee.std_logic_1164.all;
PACKAGE matrizes IS
TYPE array_entrada IS ARRAY (0 TO 3, 0 TO 3, 0 TO 3) OF STD_LOGIC;
TYPE array_saida IS ARRAY (0 TO 3, 0 TO 3, 0 TO 3) OF STD_LOGIC;
END matrizes;
----------------------
-- MAIN CODE
----------------------
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.matrizes.all;
ENTITY rct IS
PORT (
clk: IN STD_LOGIC;
entrada: IN array_entrada;
saida: OUT array_saida);
END rct;
ARCHITECTURE comportamento OF rct IS
TYPE array1 IS ARRAY (0 TO 3, 0 TO 3, 0 TO 3) OF STD_LOGIC;
SIGNAL sinal_entrada: array1;
Begin
PROCESS(CLK)
BEgin
FOR i IN 0 TO 3 LOOP
FOR ii IN 0 TO 3 LOOP
FOR iii IN 0 TO 3 LOOP
sinal_entrada(i,ii, iii)<= entrada(i,ii, iii);
saida(i,ii, iii)<=sinal_entrada(i,ii, iii);
END LOOP;
END LOOP;
END LOOP;
END PRocess;
END comportamento;
The numbers represents pixels of an image.
I want to work with an 8x8 image, each pixel with 8 bits.
Maybe there's some easiest way to do that. This is just what I could think about.
As reference I'm using the book Circuit Design with VHDL - Pedroni.
Thank You!