basic type conversion STD_LOGIC_VECTOR to INTEGER

Hi,

Since you are including the numeric_std library (which is the preferred library to use in any case) you need to go through a signal of type unsigned.

I would use an intermediate signal defined as an unsigned, you can cast a std_logic_vector to unsigned by in this case:

my_unsigned <= unsigned(writedata);

This can then be followed by:

tmp_delay <= tmp_delay + to_integer(my_unsigned);

Or, you could do something like

tmp_delay <= tmp_delay + to_integer(unsigned(writedata));

Regards

J