Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Basic question

Learning Quartus II: When I create a schematic sub-block in the main schematic block design file, the compiler will not recognize connections in or out of the sub block. I have named the signals in and our the same, but no luck?

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Learning Quartus II: When I create a schematic sub-block in the main schematic block design file, the compiler will not recognize connections in or out of the sub block. I have named the signals in and our the same, but no luck?

    --- Quote End ---

    Hi,

    can you post your bdf-file ?

    Kind regards

    GPK
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hello Pletz,

    Thanks for replying, here is the project in zip file which produces the compilation error.

    This is a simple project consisting of an input pin, connected to a sub-block that contains a nand gate, then back to an output pin.

    Thanks,

    Arthur
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    In your top schematic, you have an empty sub-block, not the intended subblock-schematic. You have to insert the correct sub-block or rename the "block_name" block.

    P.S.: Your sub-block has no in- and output ports. So it can't be connected.