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Altera_Forum
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11 years ago

Basic Problems with altlvds_rx ipcore on CycloneV

Dear everyone, I have to receive LVDS data stream based on altlvds_rx on cycloneV device. LVDS data pairs are 500Mbps with accompany 250MHz clock(DDR mode). I set following parameters in the ipcore: ...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Yes, it's a rounding issue between different frequencies so they're no longer exact multiples of each other and is a bug. Improvements have been made in this, but can't be ported into existing architectures because it would change timing analysis on existing designs.