Base address of SOPC components - exportable?

>but usually the way this is done is by having the CPU configure the component at run time.

Ah yes - that seems like a better solution. I'm a little short of logic elements on this design, so how many extra logic elements do you think it would add? (I already have a slave config interface...)

I was assuming a constant address would use next to no logic elements, but a variable address would involve a storage register for the base address, and an extra 32-bit adder to add together base+offset for each memory access - with all the connecting logic that would be about 100 LE's, which seems like quite a lot...