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Altera_Forum's avatar
Altera_Forum
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18 years ago

assignments.

How can I assign a std_logic_vector type output a value of 9? Quartus says integer literal not matched or something. if q: OUT std_logic_vector(3 downto 0); can i do: q<= '1001'; ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I would use IEEE.numeric_std.all;

This is a proper standard IEEE library. The std_logic_signed / unsigned and std_logic_arith are not standard packages - Mentor and Synopsis have different implementations. The packages are just naughtily compiled into the IEEE library.