Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI would recommend using std_logic_vector. A std_logic_vector is just an array of std_logic:
signal my_slv : std_logic_vector(31 downto 0);I would recommend using std_logic_vector. A std_logic_vector is just an array of std_logic:
signal my_slv : std_logic_vector(31 downto 0);