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Thanks very much. I just wonder what is the definition of clock tree? I always see it but don't understand very well. Is the specific wire inside FPGA for clock signal? How can I know whether the clock tree is enough for my design?
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No. A single clock buffer can't drive to all the flip-flops, memory blocks and etc in a chip -- the load would be too big.
So, you need a tree: one clock buffer drives a few clock buffers, each of them drives a few more, etc, etc, until at the end you have the capability to drive every flip-flop and etc in the chip.
The FPGAs have several such clock trees and any of the global clock trees can drive the entire FPGA.
If you only have one clock, then you only use one of those trees. But if you have multiple clocks or you're gating/muxing clocks using multiple ALTCLKCTRL blocks, then you'll use multiple clock trees.
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