Any Altera FPGA boards that support OpenCL on Soc?

It depends on what you are trying to accelerate and how you optimize. The amount of what I call "overhead" hardware is reduced when targetting the SoC device because you don't have PCIe and other stuff in the way. If you already have an OpenCL license you could try compiling any kernels that you already have and extrapolating whether they'll fit in the SoC device by comparing the resources of the Stratix V device to the Cyclone V SoC device.

Often you can break kernels down into smaller pieces and handle the processing with multiple hardware image files. Then what you can do is swap kernel files in and out. Of course you need to make sure the processing time is significant so that you don't spend all the time swapping hardware instead of processing.

While you contact Altera to get more information I recommend you let them know what you intend to accelerate since they may have already seen similar situations and can offer advice if there will be enough logic available to implement what you want.