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DM38's avatar
DM38
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2 years ago
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AN 556 - JTAG Secure Design Example Files

Hi, I was wondering if anyone had the following design example files referenced in the AN 556: Using the Design Security Features in Intel FPGAs? I have not been able to find them anywhere and would appreciate it if someone could post them. Thank you.

  • JTAG_Lock_Unlock.bdf
  • JTAG_Lock_Unlock_wysiwyd.v
  • ALTINT_OSC.v
  • User_logic_control_block.v
  • Pulse_nconfig.jam

3 Replies

  • lixy's avatar
    lixy
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    2 years ago

    Hi there,


    If there's currently no further requests, I am setting this question to resolved.

    By the way, we would appreciate it if you can take a moment to fill in the satisfaction survey. Your feedback is valuable and helps us improve our support quality.


    Best regards,

    ​​​​​​​Xiaoyan


    • too_chappy's avatar
      too_chappy
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      5 months ago

      Hi!

      This link no longer works. How can I get this design example?

      Thank you so much!

      Thao