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minkyo's avatar
minkyo
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5 years ago

ALTPLL ouput clock doesn't synchronize.

Hi I'm using cyclone 10 lp which is 10CL120YF484I7G on my own board. My problem is when I made clock using alt pll, the clock's phasee didn't matches. Actually, I'm using 2 alt pll to make...
minkyo's avatar
minkyo
Icon for New Contributor rankNew Contributor
5 years ago

Hi

Thank you for the answer.

I mean, the output clocks misaligned.

For example, when Plll outputs a,b,c, a,b,c are not aligned each other.

Could I make output clocks aligned ?

Thanks

EngWei_O_Intel's avatar
EngWei_O_Intel
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5 years ago

Hi Minkyo

Sorry for late response. May I know which PLL or fPLL you are using? Are you able to get the exact output freq 12.288Mhz, 3.072Mhz, and 48KHz? If the exact freq isn't available, you the outclk might be misaligned.

Thanks.

Eng Wei

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Hi Minkyo

    Hope you are doing fine. We do not receive any response from you to the previous question that have been asked. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

    Eng Wei